This invention relates to a bonded structure having a peripheral sealing sidewall and methods of manufacturing the same.
Bonding of multiple substrates is required to enable three-dimensional integration of wafers. Because typical substrates have a tapered or rounded surface at the periphery, which is referred to as the bevel region, the contact between two bonded substrates is limited to an area that excludes the periphery of the substrates. The taper or rounding of the surfaces may be caused, for example, by lack of masking on the peripheral area of a substrate during an etch, or by a chuck that presses the substrate down during deposition, or inherent incoming substrate geometry includes a beveled substrate edge, thereby blocking deposition of material on the peripheral area.
Through-substrate-via (TSV) structures, formed after multiple substrates are bonded and optionally thinned, provide electrical connection across the multiple substrates in a bonded structure. A TSV structure includes a conductive material such as copper or tungsten.
Between the step of bonding of two substrates and the step of formation of TSV structures, one or both of the substrates in the bonded structure may be thinned to facilitate formation of TSV structures. The thinning process employs slurries for planarization and generates particles of the material removed from the substrate(s) of the bonded structure. Such materials generated or applied during the thinning process tend to get into the space at the interface between two bonded substrates. Thus, semiconductor devices at the interface of a bonded structure may be subjected to such materials during the thinning process.
Further, the bonded structure may be subjected to wet processing steps, such as wet etching or a wet clean, that are intended to treat exposed backside surfaces and/or surfaces within through substrate cavities within the bonded structure. During such wet processing steps, however, semiconductor structures and materials at the interface between the bonded substrates can be exposed to a wet chemical that seeps in from the periphery of the bonded substrates. Thus, semiconductor devices and materials at the interface of a bonded structure may be subjected an unintentional exposure to wet chemicals employed in processing steps after bonding.